Computer and Memory
1. Consider a 32-bit microprocessor, with a 16-bit external data bus, driven by an 8-MHz input clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate across the bus that this microprocessor can sustain in bytes/s? Since minimum bus cycle duration = 4 clock cycles and bus clock = 8 MHz Then, maximum bus cycle rate = 8 M / 4 = 2 M/s Data transferred per bus cycle = 16 bit = 2 bytes Data transfer rate per second = bus cycle rate * data per bus cycle = 2 M * 2 = 4 Mbytes/sec.
2. A computer has a cache, main memory, and a disk used for virtual memory. If a referenced word is in the cache, 20 ns are required to access it. If it is in main memory but not in the cache, 60 ns are needed to load it into the cache (this includes the time to originally check the cache), and then the reference is started again. If the word is not in main memory, 12 ms are required to fetch the word from disk, followed by 60 ns to copy it to the cache, and then the reference is started again. The cache-hit ratio is 0. 9 and the main-memory hit ratio is 0. 6.
Computer and Memory Essay Example
What is the average time in ns (Nano second) required to access a referenced word on this system? 90% (0. 9) is the time it is in cache. 0. 10% * 60% (0. 06) is the time it is not in cache but is in memory. 4% (0. 04) (obtained from 1-90% – 6%) of the time it is neither in cache or memory 0. 9 (20ns) +0 . 06 (60 ns + 20ns) + . 04 (12ms + 60ns +20ns) 18ns + 4. 8ns + . 48ms (I’ve dropped the rest because it is minimal compare to the access to disk) = 480 microseconds 3. A user program begins at t=0. At t =10, a printer interrupt occurs and at t=15, a communications interrupt occurs and at t=20, a disk interrupt occurs.
Given the service times of 20, 30, and 10 for printer interrupt, communication interrupt, and disk interrupt respectively, and the desk interrupt has the highest priory followed by printer and then communication interrupt. Which one of the following statements give the correct finish times for the printer interrupt. 4. What does PC register stands for? What value does it hold? It keeps track of the next memory address of the instruction that is to be executed once the execution of the current instruction is completed.
In other words, it holds the address of the memory location of the next instruction when the current instruction is executed by the microprocessor. 5. What is a memory word? And what does it contain? Internal storage areas in the computer. The term memory identifies data storage that comes in the form of chips, and the word storage is used for memory that exists on tapes or disks. Moreover, the term memory is usually used as shorthand for physical memory, which refers to the actual chips capable of holding data. Some computers also use virtual memory, which expands physical memory onto a hard disk.
Every computer comes with a certain amount of physical memory, usually referred to as main memory or RAM. You can think of main memory as an array of boxes, each of which can hold a single byte of information. A computer that has 1 megabyte of memory, therefore, can hold about 1 million bytes (or characters) of information. There are several different types of memory: RAM (random-access memory): This is the same as main memory. When used by itself, the term RAM refers to read and write memory; that is, you can both write data into RAM and read data from RAM.
This is in contrast to ROM, which permits you only to read data. Most RAM is volatile, which means that it requires a steady flow of electricity to maintain its contents. As soon as the power is turned off, whatever data was in RAM is lost. ROM (read-only memory): Computers almost always contain a small amount of read-only memory that holds instructions for starting up the computer. Unlike RAM, ROM cannot be written to. PROM (programmable read-only memory): A PROM is a memory chip on which you can store program. But once the PROM has been used, you cannot wipe it clean and use it to store something else.
Like ROMs, PROMs are non-volatile. 6. What is meant by interrupt? Why it is useful? An interrupt is a signal from a device attached to a computer or from a program within the computer that causes the main program that operates the computer (the operating system ) to stop and figure out what to do next. Almost all personal (or larger) computers today are interrupt-driven – that is, they start down the list of computer instruction s in one program (perhaps an application such as a word processor) and keep running the instructions until either (A) they can’t go any further or (B) an interrupt signal is sensed.
After the interrupt signal is sensed, the computer either resumes running the program it was running or begins running another program. 7. What are the two main parts of instruction cycle? What does each part do? The time period during which one instruction is fetched from memory and executed when a computer is given an instruction in machine language. There are typically four stages of an instruction cycle that the CPU carries out: Fetch the instruction from memory. This step brings the instruction into the instruction register, a circuit that holds the instruction so that it can be decoded and executed.
Decode the instruction. Read the effective address from memory if the instruction has an indirect address. Execute the instruction. . 8. What do MAR and MBR stand for? What are they used for? MAR stand for memory address register MDR stand for memory data register MAR it holds the address of the currently addressed memory location MBR it holds the code read from the currently address memory location 9. What is the fastest and second fastest form of memory? Why there are many levels of memories (memory hierarchy)? CPU’s general purpose registers.
The registers provide the fastest access to data possible, and the second fastest form of memory is Cache. There are many levels of memory hierarchy to have good cost and performance of the various places we can store data and instructions 10. Assume the cache hit ration is 85% and the access time for the cache is 1 micro second whereas the access time for the main memory is 100micro second. What is the average access time? Average Memory Access time = Hit time + Miss Rate x Miss penalty (0. 85) (0. 1 µs) + (0. 05) (0. 1 µs + 1 µs) = 0. 085 + 0. 055 = 0. 14 µs 11. What is cache replacement algorithm?
Mention a strategy that can be used for cache replacement? A cache replacement algorithm is a detailed list of instructions that directs which items should be discarded in a computing device’s cache of information. Examples of cache algorithms include: Least Frequently Used (LFU): This cache algorithm uses a counter to keep track of how often an entry is accessed. Least Recently Used (LRU): This cache algorithm keeps recently used items near the top of cache. Adaptive Replacement Cache (ARC): Developed at the IBM Almaden Research Center, this cache algorithm keeps track of both LFU and LRU 12.
What is a process? List 4 of process elements and explain them? Is an instance of a computer program that is being executed? It contains the program code and its current activity. 1- Program counter : always have instruction number to know what to execute next 2- Context data : information about the process 3- Memory pointer : point to code 4- Priority : mange the process 13. What does the dispatcher do? When does it work? The dispatcher component is responsible for routing control to the highest priority unit of work that is ready to execute. The dispatcher processes work in the following order: 1.
Special exits These are exits to routines that have a high priority because of specific conditions in the system. For example, if one processor in a multiprocessing system fails, alternate CPU recovery is invoked by means of a special exit to recover work that was being executed on the failing processor. 2. SRBs that have a global priority 3. Ready address spaces in order of priority An address space is ready to execute if it is swapped in and not waiting for some event to complete. An address space’s priority is determined by the dispatching priority specified by the user or the installation.
After selecting the highest priority address space, z/OS (through the dispatcher) first dispatches SRBs with a local priority that is scheduled for that address space and then TCBs in that address space. 14. What is a blocked process? A blocking process is usually waiting for an event such as a semaphore being released or a message arriving in its message queue. In multitasking systems, such processes are expected to notify the scheduler with a system call that it is to wait, so that they can be removed from the active scheduling queue until the event occurs